hmps-282x series minipak surface mount rf schottky barrier diodes data sheet description/applications these ultra-miniature products represent the blending of avago technologies proven semiconductor and the latest in leadless packaging. this series of schottky diodes is the most consistent and best all-round device available, and fnds applications in mixing, detecting, switching, sampling, clamping and wave shaping at frequencies up to 6 ghz. the minipak package ofers reduced parasit - ics when compared to conventional leaded diodes, and lower thermal resistance. the hmps-282x family of diodes ofers the best all-around choice for most applications, featuring low series resis - tance, low forward voltage at all current levels and good rf characteristics. note that avagos manufacturing techniques assure that dice found in pairs and quads are taken from adjacent sites on the wafer, assuring the highest degree of match. minipak 1412 is a ceramic based package, while minipak qfn is a leadframe based package. features ? surface mount minipak package ? better thermal conductivity for higher power dissipation ? single and dual versions ? matched diodes for consistent performance ? low turn-on voltage (as low as 0.34 v at 1 ma) ? low fit (failure in time) rate* ? six-sigma quality level ? for more information, see the surface mount schottky reliability data sheet. pin connections and package marking notes: 1. package marking provides orientation and identifcation. 2. see electrical specifcations for appropriate package marking. 3 2 p r o d u c t c o d e d a t e c o d e 4 a a 1 s i n g l e 3 2 4 1 # 0 a n t i - p a r a l l e l 3 2 4 1 # 2 p a r a l l e l 3 2 4 1 # 5 ( m i n i p a k 1 4 1 2 ) ( m i n i p a k 1 4 1 2 ) ( m i n i p a k 1 4 1 2 ) a n t i - p a r a l l e l 3 2 4 1 # 2 ( m i n i p a k q f n ) p a r a l l e l 3 2 4 1 # 5 ( m i n i p a k q f n ) package lead code identifcation (top view)
hmps-282x series absolute maximum ratings [1] , t c = 5c symbol parameter units minipak 1412/ minipak qfn i f forward current (1 s pulse) a 1 p iv peak inverse voltage v 15 t j junction temperature c 150 t stg storage temperature c -65 to +150 jc thermal resistance [2] c/w 150 notes: 1. operation in excess of any one of these conditions may result in permanent damage to the device. 2. t c = +25c, where t c is defned to be the temperature at the package pins where contact is made to the circuit board. minipak 1412 electrical specifcations, t c = +5c , single diode [4] part number hmps- package marking code lead code confguration minimum breakdown voltage v br (v) maximum forward voltage v f (mv) maximum forward voltage v f (v) @ i f (ma) maximum reverse leakage i r (na) @ v r (v) maximum capacitance c t (pf) typical dynamic resistance r d () [4] 2820 l 0 single 15 340 0.5 10 100 1 1.0 12 test conditions i r = 100 a i f = 1 ma [1] v f = 0 v f = 1 mhz [2] i f = 5 ma notes: 1. ?v f for diodes in pairs is 15 mv maximum at 1 ma. 2. ?c to for diodes in pairs is 0.2 pf maximum. 3. efective carrier lifetime () for all these diodes is 100 ps maximum measured with krakauer method at 5 ma. 4. r d = r s + 5.2f at 25c and i f = 5 ma. esd warning: handling precautions should be taken to avoid static discharge. minipak qfn electrical specifcations, t c = +5c , single diode [4] part number hmps- package marking code lead code confguration minimum breakdown voltage v br (v) maximum forward voltage v f (mv) maximum forward voltage v f (v) @ i f (ma) maximum reverse leakage i r (na) @ v r (v) maximum capacitance c t (pf) typical dynamic resistance r d () [4] 2822 2825 3 2 2 5 anti-parallel parallel 15 340 0.5 10 100 1 1.0 12 test conditions i r = 100 a i f = 1 ma [1] v f = 0 v f = 1 mhz [2] i f = 5 ma notes: 1. ?v f for diodes in pairs is 15 mv maximum at 1 ma. 2. ?c to for diodes in pairs is 0.2 pf maximum. 3. efective carrier lifetime () for all these diodes is 100 ps maximum measured with krakauer method at 5 ma. 4. r d = r s + 5.2f at 25c and i f = 5 ma.
c j r j r s r j = 8.33 x 10 -5 nt i b + i s where i b = externally applied bias current in amps i s = saturation current (see table of spice parameters) t = temperature, k n = ideality factor (see table of spice parameters) note: to ef fectively model the packaged hsms-282x product, please refer to application note an1 124. r s = series resistance (see ta ble of spice parameters) c j = junction capacitance (see ta ble of spice parameters) linear equivalent circuit model diode chip spice parameters parameter units hmps-282x b v v 15 c j0 pf 0.7 e g ev 0.60 i bv a 1e-4 i s a 2.2e-8 n 1.08 r s f 8.0 p b v 0.65 p t 2 m 0.5 minipak 1412 linear circuit model of the diodes package minipak qfn linear circuit model of the diodes package 3 0 f f 3 0 f f 2 0 f f 2 0 f f 1 . 1 n h s i n g l e d i o d e p a c k a g e ( h m p x - x 8 x 0 ) 2 3 1 4 2 0 f f 1 6 f f 1 8 f f 1 9 f f 2 f f 0 . 3 2 8 n h a n t i - p a r a l l e l d i o d e p a c k a g e ( h m p x - x 8 x 2 ) 2 3 1 4 0 . 3 2 8 n h 0 . 0 4 3 n h 0 . 3 2 9 n h 0 . 0 5 3 n h 0 . 0 5 3 n h 0 . 3 2 9 n h 0 . 0 4 5 n h p a r a l l e l d i o d e p a c k a g e ( h m p x - x 8 x 5 ) 2 3 1 4 2 0 f f 1 6 f f 1 8 f f 1 9 f f 2 f f 0 . 3 2 8 n h 0 . 3 2 8 n h 0 . 0 4 3 n h 0 . 3 2 9 n h 0 . 0 5 3 n h 0 . 0 5 3 n h 0 . 3 2 9 n h 0 . 0 4 5 n h
4 minipak 1412 hmps-282x series typical performance t c = 25c (unless otherwise noted), single diode figure 1. fo rw ard current vs . fo rw ard v oltage at t emperatures . 0 0.10 0.20 0.30 0.50 0.40 i f ? forward current (ma) v f ? forward voltage (v) 0.01 10 1 0.1 100 t a = +125 c t a = +75 c t a = +25 c t a = ?25 c figure 2. reverse current vs. reverse voltage at temperatures. 0 5 15 i r ? reverse current (na) v r ? reverse voltage (v) 10 1 1000 100 10 100,000 10,000 t a = +125 c t a = +75 c t a = +25 c figure 3. total capacitance vs. reverse voltage at 1mhz 0 2 8 6 c t ? capacitance (pf) v r ? reverse voltage (v) 4 0 0.6 0.4 0.2 1 0.8 figure 4. dynamic resistance vs. forward current. 0.1 1 100 r d ? dynamic resistance ( ) i f ? forward current (ma) 10 1 10 1000 100 v f - forward voltage (v) figure 5. typical v f match, series pairs and quads at mixer bias levels. 30 10 1 0.3 30 10 1 0.3 i f - forward current (ma) v f - forward voltage difference (mv) 0.2 0.4 0.6 0.8 1.0 1.2 1.4 i f (left scale) v f (right scale) v f - forward voltage (v) figure 6. typical v f match, series pairs at detector bias levels. 100 10 1 1.0 0.1 i f - forward current ( a) v f - forward voltage difference (mv) 0.10 0.15 0.20 0.25 i f (left scale) v f (right scale) figure 7. typical output voltage vs. input power, small signal detector operating at 850 mhz. -40 -30 18 nh rf in 3.3 nh 100 pf 100 k hsms-282b vo 0 v o ? output voltage (v) p in ? input power (dbm) -10 -20 0.001 0.01 1 0.1 -25 c +25 c +75 c dc bias = 3 a figure 8. typical output voltage vs. input power, large signal detector operating at 915 mhz. -20 -10 rf in 100 pf 4.7 k 68 hsms-282b vo 30 v o ? output voltage (v) p in ? input power (dbm) 10 20 0 1e-005 0.0001 0.001 10 0.1 1 0.01 +25 c local oscillator power (dbm) figure 9. typical conversion loss vs. l.o. drive, 2.0 ghz (ref an997). conversion loss (db) 12 10 9 8 7 6 2 0 6 8 1 0 4
5 minipak qfn hmps-2825 series typical performance t c = 25c (unless otherwise noted), single diode 0 . 0 1 0 . 1 1 1 0 1 0 0 0 0 . 1 0 . 2 0 . 3 0 . 4 0 . 5 v f - f o r w a r d v o l t a g e ( v ) i f - f o r w a r d c u r r e n t ( m a ) t a = + 1 2 5 c t a = + 7 5 c t a = + 2 5 c t a = - 2 5 c 1 1 0 1 0 0 1 0 0 0 1 0 0 0 0 1 0 0 0 0 0 0 5 1 0 1 5 v r ? r e v e r s e v o l t a g e ( v ) i r ? r e v e r s e c u r r e n t ( n a ) t a = + 1 2 5 c t a = + 7 5 c t a = + 2 5 c 0 . 0 0 . 2 0 . 4 0 . 6 0 . 8 1 . 0 0 2 4 6 8 v r - r e v e r s e v o l t a g e ( v ) c t - c a p a c i t a n c e ( p f ) figure 10. forward current vs. forward voltage at temperatures. figure 11. reverse current vs. reverse voltage at temperatures. figure 12. total capacitance vs. reverse voltage at 1mhz figure 13. dynamic resistance vs. forward current. figure 14. typical vf match, series pairs and quads at mixer bias levels. figure 15. typical vf match, series pairs at detector bias levels. figure 16. typical conversion loss vs. l.o. drive, 2.0 ghz (ref an997). v f - f o r w a r d v o l t a g e ( v ) 3 0 1 0 1 0 . 3 3 0 1 0 1 0 . 3 i f - f o r w a r d c u r r e n t ( m a ) ? v f - f o r w a r d v o l t a g e d i f f e r e n c e ( m v ) 0 . 2 0 . 4 0 . 6 0 . 8 1 . 0 1 . 2 1 . 4 i f ( l e f t s c a l e ) ? v f ( r i g h t s c a l e ) v f - f o r w a r d v o l t a g e ( v ) 1 0 0 1 0 1 1 . 0 0 . 1 i f - f o r w a r d c u r r e n t ( a ) ? v f - f o r w a r d v o l t a g e d i f f e r e n c e ( m v ) 0 . 1 0 0 . 1 5 0 . 2 0 0 . 2 5 i f ( l e f t s c a l e ) ? v f ( r i g h t s c a l e ) 1 1 0 1 0 0 1 0 0 0 0 . 1 1 . 0 1 0 . 0 1 0 0 . 0 i f - f o r w a r d c u r r e n t ( m a ) r d - d y n a m i c r e s i s t a n c e ( o h m s ) l o c a l o s c i l l a t o r p o w e r ( d b m ) c o n v e r s i o n l o s s ( d b ) 1 2 1 0 9 8 7 6 2 0 6 8 1 0 4
assembly information the minipak diode is mounted to the pcb or microstrip board using the pad pattern shown in figure 17. 0.4 0.4 0.3 0.5 0.3 0.5 figure 17. pcb pad layout, minipak (dimensions in mm). this mounting pad pattern is satisfactory for most ap - plications. however, there are applications where a high degree of isolation is required between one diode and the other is required. for such applications, the mounting pad pattern of figure 18 is recommended. 2.60 0.40 0.20 0.40 mm via hole (4 places) 0.8 2.40 figure 18. pcb pad layout, high isolation minipak (dimensions in mm). this pattern uses four via holes, connecting the crossed ground strip pattern to the ground plane of the board. smt assembly reliable assembly of surface mount components is a complex process that involves many material, process, and equipment factors, including: method of heating (e.g., ir or vapor phase refow, wave soldering, etc.) circuit board material, conductor thickness and pattern, type of solder alloy, and the thermal conductivity and thermal mass of components. components with a low mass, such as the minipak package, will reach solder refow tempera - tures faster than those with a greater mass. after ramping up from room temperature, the circuit board with components attached to it (held in place with solder paste) passes through one or more preheat zones. the preheat zones increase the temperature of the board and components to prevent thermal shock and begin evaporating solvents from the solder paste. the refow zone briefy elevates the temperature sufciently to produce a refow of the solder. the rates of change of temperature for the ramp-up and cool-down zones are chosen to be low enough to not cause deformation of the board or damage to components due to thermal shock. the maximum temperature in the refow zone (t max ) should not exceed 255c. these parameters are typical for a surface mount assembly process for avago diodes. as a general guideline, the circuit board and components should be exposed only to the minimum temperatures and times necessary to achieve a uniform refow of solder.
minipak 1412 outline drawing minipak qfn outline drawing 1 . 4 4 ( 0 . 0 5 7 ) 1 . 4 0 ( 0 . 0 5 5 ) t o p v i e w s i d e v i e w d i m e n s i o n s a r e i n m i l l i m e t e r s ( i n c h e s ) b o t t o m v i e w 1 . 2 0 ( 0 . 0 4 7 ) 1 . 1 6 ( 0 . 0 4 6 ) 0 . 7 0 ( 0 . 0 2 8 ) 0 . 5 8 ( 0 . 0 2 3 ) 1 . 1 2 ( 0 . 0 4 4 ) 1 . 0 8 ( 0 . 0 4 3 ) 0 . 8 2 ( 0 . 0 3 2 ) 0 . 7 8 ( 0 . 0 3 1 ) 0 . 3 2 ( 0 . 0 1 3 ) 0 . 2 8 ( 0 . 0 1 1 ) - 0 . 0 7 ( - 0 . 0 0 3 ) - 0 . 0 3 ( - 0 . 0 0 1 ) 0 . 0 0 - 0 . 0 7 ( - 0 . 0 0 3 ) - 0 . 0 3 ( - 0 . 0 0 1 ) 0 . 4 2 ( 0 . 0 1 7 ) 0 . 3 8 ( 0 . 0 1 5 ) 0 . 9 2 ( 0 . 0 3 6 ) 0 . 8 8 ( 0 . 0 3 5 ) 1 . 3 2 ( 0 . 0 5 2 ) 1 . 2 8 ( 0 . 0 5 0 ) 0 . 0 0 b o t t o m v i e w 0 . 5 0 ( 0 . 0 2 0 ) 0 . 6 0 ( 0 . 0 2 4 ) 0 . 4 0 ( 0 . 0 1 6 ) 0 . 3 0 ( 0 . 0 1 2 ) 0 . 3 5 ( 0 . 0 1 4 ) 1 . 4 7 ( 0 . 0 5 8 ) 1 . 3 7 ( 0 . 0 5 4 ) 1 . 2 3 ( 0 . 0 4 8 ) 1 . 1 3 ( 0 . 0 4 4 ) t o p v i e w 0 . 6 0 ( 0 . 0 2 4 ) 0 . 5 0 ( 0 . 0 2 0 ) s i d e v i e w d i m e n s i o n s a r e i n m i l l i m e t e r s ( i n c h e s ) 0 . 5 0 ( 0 . 0 2 0 ) 0 . 2 8 ( 0 . 0 1 1 ) 0 . 2 8 ( 0 . 0 1 1 ) ordering information part number no. of devices container hmps-282x-tr2 10000 13? reel hmps-282x-tr1 3000 7? reel hmps-282x-blk 100 antistatic bag
tape dimensions and product orientation for outline 4t (minipak 1412 & minipak qfn) p p 0 p 2 f w c d 1 d e a 0 5 max. t 1 (carrier tape thickness) t t (cover tape thickness) 5 max. b 0 k 0 description length width depth pitch bottom hole diameter a 0 b 0 k 0 p d 1 1.40 0.05 1.63 0.05 0.80 0.05 4.00 0.10 0.80 0.05 0.055 0.00 2 0.064 0.00 2 0.031 0.00 2 0.157 0.00 4 0.031 0.00 2 cavit y diameter pitch position d p 0 e 1.50 0.10 4.00 0.10 1.75 0.10 0.060 0.00 4 0.157 0.00 4 0.069 0.00 4 perforatio n width thickness w t 1 8.00 + 0.30 - 0.1 0 0.254 0.02 0.315 + 0.012 - 0.00 4 0.010 0.00 1 carrier tape cavity to perforation (width direction) cavity to perforation (length direction) f p 2 3.50 0.05 2.00 0.05 0.138 0.00 2 0.079 0.00 2 distance width tape thickness c t t 5.40 0.10 0.062 0.00 1 0.213 0.00 4 0.002 0.00004 cover tape symbol size (mm) size (inches) device orientation u s e r f e e d d i r e c t i o n c o v e r t a p e c a r r i e r t a p e r e e l e n d v i e w 8 m m 4 m m t o p v i e w a a a a a a a a n o t e : ? a a ? r e p r e s e n t s p a c k a g e m a r k i n g c o d e . p a c k a g e m a r k i n g i s r i g h t s i d e u p w i t h c a r r i e r t a p e p e r f o r a t i o n s a t t o p . c o n f o r m s t o e l e c t r o n i c i n d u s t r i e s r s - 4 8 1 , ? t a p i n g o f s u r f a c e m o u n t e d c o m p o n e n t s f o r a u t o m a t e d p l a c e m e n t . ? s t a n d a r d q u a n t i t y i s 3 , 0 0 0 d e v i c e s p e r r e e l . for product information and a complete list of distributors, please go to our web site: www.avagotech.com avago, avago technologies, and the a logo are trademarks of avago technologies in the united states and other countries. data subject to change. c opyright ? 005- 009 avago technologies. all rights reserved. obsoletes 5989-8en av0 -05 1en - january , 009
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